Integrated Circuits and Systems group, IIT Madras

Source: https://www.ee.iitm.ac.in/vlsi/newsarchives Parent: https://www.ee.iitm.ac.in/vlsi/

Table of Contents

• News archive

• 2024

• 2023
• 2022
• 2021
• 2020
• 2019
• 2018
• 2017
• 2016
• 2015
• 2014
• 2013
• 2012
• 2011
• 2010
• 2009
• 2008
• 2007
• 2006

News archive

2024

• Aman Saini, M Kameswar Reddy, Nandita Sarkar, Pratik Prashant Bharabat, Sammith K A, and Vaishnav J have joined our research group. A warm welcome to all of them!
• Prakhar Rathore has joined the group. A warm welcome to him!

2023

• Dr. Ramprasath has joined our group. He is an expert on EDA. We extend a warm welcome to him!
• Ankit Agarwal, Arkajyoti Bhattacharya, Chetan Shivalingappa Rajenavar, Daware Prathamesh Mahipati, Gajanan M Kamat, Harish Madhavan S, Harshitha S K, Keerthana Ramesh, Pentyala Kishan, Pullepu Guna Sekhar, Rahul M, and Suhas S M have joined our research group. A warm welcome to all of them!
• The paper Bandpass Filter and Oscillator ICs with THD < -140dBc at 10Vppd for Testing High-Resolution ADCs by Subha Sarkar, Rajat Agarwal, and Nagendra Krishnapura is accepted for presentation at the 2023 International Solid-State Circuits Conference(ISSCC).
• The paper A 0.5-to-400MHz Programmable BAW Oscillator with Fractional Output Divider Achieving 4ppm Frequency Stability over Temperature and <95fs Jitter co-authored by N. Raghavendra Reddy and S. Aniruddhan is accepted for presentation at the 2023 International Solid-State Circuits Conference(ISSCC).

2022

• Abhishek Chaudhary, Mouna Krishna Gadhiraju, and MGK Sai Charan have joined our research group. A warm welcome to them!
• Anu Rajarajeswari and Charishma Routhu have joined our research group. A warm welcome to them!

2021

• A webinar outlining the past work and future goals of out center for excellence in “RF, Analog and Mixed Signal Integrated Circuits” was held on 22nd October 2021 online. It was moderated by Prof. Mike Chen of the University of Southern California. Shanthi Pavan, Janakiraman V., Saurabh Saxena, and Nagendra Krishnapura answered questions from the audience. It can be viewed online at this link.

• Abhishek Bhandari, Abhishek Pandey, Brijendra Kumar, Debojyoti Sinh Roy, Koutharapu Venkatesh, Laxmi Choudhary, Md Tarique, Nagabhushana Rao Panila, Ritavash Das, Ritvik Singh, Sarvjit Ajit Patil, Suryadipto Mukherjee, Tirumala Navadikshith Kumar Reddy, Varchas S Bharadwaj have joined our research group. A warm welcome to all of them!

• 6 papers from the group have been accepted for presentation at the 2021 International Symposium on Circuits and Systems. Congratulations to all authors.

• Abhishek Kumar and Pramod S M have joined our research group. A warm welcome to them!

• The book Understanding Delta-Sigma Converters (2nd Edition) authored by Shanthi Pavan, Richard Schreier and Gabor Temes has received the 2020 Outstanding Professional Book Award from the Wiley-IEEE Press. The Wiley-IEEE Press Professional Book Award annually recognizes the authors of an outstanding monograph or professional book published by Wiley-IEEE Press during a three-year window prior to the year of the nomination, in a field relevant to the IEEE. https://ieee-press.ieee.org/wiley-ieee-press-awards/

• Shanthi Pavan will present an invited talk Architectural and Design Challenges in High-Resolution Continuous-Time Delta-Sigma Data Converters in the forum Pushing the Frontiers in Accuracy in Data Converters and Analog Circuits at the International Solid-State Circuits Conference (ISSCC) in February 2021.

2020

• The book Understanding Delta-Sigma Converters (2nd Edition) authored by Shanthi Pavan, Richard Schreier and Gabor Temes has received the 2020 Outstanding Professional Book Award from the Wiley-IEEE Press. The Wiley-IEEE Press Professional Book Award annually recognizes the authors of an outstanding monograph or professional book published by Wiley-IEEE Press during a three-year window prior to the year of the nomination, in a field relevant to the IEEE. https://ieee-press.ieee.org/wiley-ieee-press-awards/

• Shanthi Pavan will present an invited talk Architectural and Design Challenges in High-Resolution Continuous-Time Delta-Sigma Data Converters in the forum Pushing the Frontiers in Accuracy in Data Converters and Analog Circuits at the International Solid-State Circuits Conference (ISSCC) in February 2021.

• Ankit, Arkaprabha, Chetna, Jeffry George, Manoj, Meghna, Para Brahmachari, Neel, Nilanjan, Nishanth, Paramita, Ravi Teja, Abhinav, Rohan, Sattiwk, Shivam, Shubham, Snigdha, Sumanth, Tavesh, Utkarsh, Vaibhav, and Vivek have a joined our research group. A warm welcome to all of them!

• The paper A 20 MHz Bandwidth Continuous-Time Delta-Sigma ADC Achieving 82.1 dB SNDR and >100 dB SFDR Using a Time-Interleaved Virtual-Ground-Switched FIR Feedback DAC by Alok Baluni and Shanthi Pavan was presented at the IEEE Custom Integrated Circuits Conference in Mar. 2020. This paper won the outstanding student paper award at the conference, and will be presented at the plenary at CICC 2021. Congratulations Alok!

• The paper An 800MHz-BW VCO-Based Continuous-Time Pipelined ADC with Inherent Anti-Aliasing and On-Chip Digital Reconstruction Filter by Hajime Shibata,…, and Shanthi Pavan was presented at the 2020 IEEE International Solid State Circuits Conference in San Francisco in Feb. 2020.

• 11 papers from the group have been accepted for presentation at the 2020 International Symposium on Circuits and Systems to be held in Seville, Spain in May 2020. Congratulations to all authors.

2019

• Pranav Kumar and Priyadharshini have joined the group. A warm welcome to them!

• The paper A 36 dB Gain Range, 0.5 dB Gain Step Variable Gain Amplifier with 10 to 25 MHz Bandwidth Third-Order Filter for Portable Ultrasound Systems by Purnendu Bhattaru and Nagendra Krishnapura will be presented at the 2020 International Conference on VLSI Design to be held in Bangalore in January 2020.

• The paper A 2-Channel ADC Using a Delta-Sigma Modulator Without Reset & a Modulated-Sinc-Sum Filter by Ashwin Kumar and Nagendra Krishnapura will be presented at the 45th European Solid-State Circuits Conference to be held in Krakow, Poland in September 2019.

• 3 papers from our group will be presented at the 2019 International Symposium on Integrated Circuits and Systems to be held in Venice, Italy, in August 2019. Congratulations to all authors!

• Ajay Kumar, Ajay Kumar Reddy, Ayush Lokhande, Chaitanya Kumar, Yogendra Singh Bhandari, and Shivam Agarwal have joined the group. A warm welcome to all of them!

• 8 papers from our group will be presented at the 2019 International Symposium on Circuits and Systems to be held in Sapporo, Japan, in May 2019. Congratulations to all authors!

• Vaibhav and Chakravarti have joined our group. A warm welcome to them!

• The paper A 25-to-38GHz, 195dB FoMT LC QVCO in 65nm LP CMOS Using a 4-Port Dual-Mode Resonator for 5G Radios by Abhishek Bhat and Nagendra Krishnapura is accepted for presentation at the 2019 International Solid-State Circuits Conference to be held in San Francisco in Feb. 2019.

2018

• Abilash Reddy, Aravindakshan, Ganta Satyanarayana, Guddanti Sivasai, Jishnu Chatterjee, Karthikeyan, Rohit Goel, Rishabh Sharma, Sonam Sadhukan, Subha Sarkar, Udit Kumar, Vinod Ganesan, and Yash Shah have joined our group. A warm welcome to all of them!

• 12 papers from our group will be presented at the 2018 International Symposium on Circuits and Systems to be held in Florence, Italy, in May 2018. Congratulations to all authors!

2017

• Ashish joined our research group. Welcome!

• Shanthi Pavan has been elevated to IEEE fellowship for his contributions to Delta-Sigma modulators. Congratulations, Shanthi!

• Asish, Ashutosh, Chintan, Gautham, Iraban, Kishore, Raghavendra, and Venkata Sesha Rao have joined the ICS group. A warm welcome to all of them.

• Online courses Basic Electrical Circuits and Analog circuits will be run on NPTEL starting 24th July 2017. Click on the respective links to register. Registration deadline is 24th July.

• Our recorded lectures will now become available on our YouTube channel. They will continue to be available at http://www.ee.iitm.ac.in/videolectures.

• Anoop Narayan Bhat received the 2016 Technoinventor award in the masters category from the India Electronics and Semiconductor Association at their 2017 vision summit.

• The paper Optimum Scaling of Stages in a Frequency Divider Chain for Best Jitter FoM by Sumit Kumar and Nagendra Krishnapura will be presented at the 2017 International Symposium on circuits and Systems to be held in Baltimore, USA in May 2017.

• The paper On Linear Periodically Time Varying (LPTV) Systems with Modulated Inputs, and Their Application to Smoothing Filters by Shanthi Pavan will be presented at the 2017 International Symposium on circuits and Systems to be held in Baltimore, USA in May 2017.

Understanding Delta-Sigma Data Converters Second Edition \ Shanthi Pavan, Richard Schreier and Gabor Temes \ Wiley and IEEE Press Series on Microelectronic Systems \ Now available! Order it on Amazon

• The paper A 500Mb/s, 200pJ/bit die-to-die bidirectional link with 24kV surge isolation and 50kV/s CMR using resonant inductive coupling in 180nm CMOS by Subhashish Mukherjee, Anoop Narayan Bhat, Kumar Anurag Shrivastava, Madhulatha Bonu, Benjamin Sutton, Jhankar Malakar, and Nagendra Krishnapura will be presented at the 2017 International Solid-State Circuits Conference to be held in San Francisco, USA in Feb. 2017.

• The paper A Low Power Multi-Channel Input Delta-Sigma ADC Without Reset by Ashwin Kumar R. S., Debasish Behera, and Nagendra Krishnapura was presented at the 2017 VLSI Design Conference held in Hyderabad in Jan. 2017.

• The following courses were conducted as a part of the Global Initiative of Academic Networks(GIAN).

• Integrated Phase and Frequency Synthesis by Sudhakar Pamarti(University of California at Los Angeles, USA), 1st to 15th March 2017.

• “Fundamentals of Numerical Modelling and Simulation of Multi-Physics and Multi-Domain Systems” by Prof. Alper Demir(Koc University, Turkey). 2-6 Jan. 2017. (Course contents)
• “Near/sub-threshold circuits and architectures for microprocessors” by Prof. Mingoo Seok(Columbia University, USA). 9-13 Jan. 2017. (Course contents)
• “Computational Techniques for Frequency-domain and Perturbation Analysis of Electronic and Multi-Physics Systems” by Prof. Jaijeet Roychowdhury(University of California, Berkeley, USA). 30th Jan. to 3rd Feb. 2017 .

2016

• Two courses were conducted as a part of the Global Initiative of Academic Networks(GIAN).

• “Advances in Flexible CMOS Radio Frequency Transceivers” by Prof. Eric Klumperink(University of Twente, the Netherlands). 12-16 Nov. 2016.

• “Designing Smart Sensor Systems” by Prof. Kofi Makinwa(Technical University of Delft, the Netherlands). 21-25 Nov. 2016.

• Dr. Qadeer Khan has joined our faculty. He has a PhD from the Oregon State University. He also has extensive industrial experience at Freescale and Qualcomm. He works in the area of integrated power management circuits. Welcome Qadeer!

• Aswani Kumar, Deepthi, Mukund Mishra, Shraman, Soumith, Sreenivasulu, Suraj Kumar, Udita Mukherjee have joined our research group. A warm welcome to all of them.

• Dr. Saurabh Saxena has joined our faculty. He has a PhD from the University of Illinois, Urbana Champaign. He works in the area of high speed serial links. Welcome Saurabh!

• The paper A 280μW 24kHz-BW 98.5dB-SNDR Chopped Single-Bit CT ΔΣM Achieving <10Hz 1/f Noise Corner Without Chopping Artifacts by Sujith Billa, Amrith Sukumaran, and Shanthi Pavan will be presented at the International Solid State Circuits Conference to be held in San Francisco, USA in Feb. 2016.

• The paper A Tail-Resonance Calibration Technique for Wide Tuning Range LC VCOs by Abhishek Bhat and Nagendra Krishnapura will be presented at the International Symposium on Circuits and Systems to be held in Montreal, Canada in May 2016.

• The paper A Compact Dual-Band 5dBm RF Power Amplifier for Cellular Applications by Aparna Girija and S. Aniruddhan will be presented at the International Symposium on Circuits and Systems to be held in Montreal, Canada in May 2016.

• The paper Continuous-Time Delta Sigma Modulators with Dual Switched Capacitor Resistor DACs by Shanthi Pavan will be presented at the International Symposium on Circuits and Systems to be held in Montreal, Canada in May 2016.

2015

• Two courses were conducted at IIT Madras as a part of the Global Initiative of Academic Networks(GIAN).

• One week course(25th-29th Dec. 2015, 4pm-7pm): Integrated Circuits for High-Speed Serial Links by Dr. Pavan Kumar Hanumolu, University of Illinois, Urbana-Champaign, USA.

• Two week course(1st to 17th Jan. 2016 with a break on 7th Jan.; 4pm-7pm): Millimeter-wave Integrated Circuits: 60GHz and Beyond by Dr. Harish Krishnaswamy, Columbia University, USA.

• The paper A Continuous-Time Delta Sigma Modulator with 91 dB Dynamic Range in a 2MHz Signal Bandwidth Using a Dual Switched-Capacitor Return-to-Zero DAC by Amrith Sukumaran and Shanthi Pavan was presented at the 2015 European Solid-State Conference held at Graz, Austria in Sep. 2015.

• Aarsh, Aditya, Apoorva, Arnab, Madhavi, Nimit, Priya, Rajashekar, Raviteja, Sandeep, and Sangeeta have joined our research group. A warm welcome to all of them!

• The paper Gain Enhanced High Frequency OTA with on-Chip Tuned Negative Conductance Load by Imon Mondal and Nagendra Krishnapura will be presented at the 2015 International On Circuits And Systems to be held in Lisbon, Portugal in May 2015.

• The paper A 10Gbps Eye Opening Monitor in 65nm CMOS by Sandeep Krishnan and Shanthi Pavan will be presented at the 2015 International On Circuits And Systems to be held in Lisbon, Portugal in May 2015.

• The paper Programmable Analog Pulse Shaping for Ultra-Wideband Applications by Naga Rajesh and Shanthi Pavan will be presented at the 2015 International On Circuits And Systems to be held in Lisbon, Portugal in May 2015.

• Our group received three of the awards from the India Electronics and Semiconductor Association given to academia at their 2015 Vison Summit. Radha S. and Rakshitdatta K. S. won the TechnoInventor awards in the PhD and Masters categories respectively and Nagendra Krishnapura won the Technomentor award.

• The paper On Slew Rate Enhancement in Class-A Opamps Using Local Common-Mode Feedback by Rakshitdatta K. S. and Nagendra Krishnapura was presented at the 28th International Conference on VLSI Design held in Bangalore from 3-7 January 2015.

• The paper Accurate Constant Transconductance Generation Without Off-chip Components by Imon Mondal and Nagendra Krishnapura was presented at the 28th International Conference on VLSI Design held in Bangalore from 3-7 January 2015.

2014

• The paper 552 nW per channel 79 nV/rtHz ECG Acquisition Front-end with Multi-Frequency Chopping by Prathamesh Khatavkar and S. Aniruddhan will be presented at the 2014 IEEE Biomedical Circuits and Systems Conference to be held in EPFL, Lausanne, Switzerland during 22-24 October 2014.

• Aritra, Arpan, Kishalay, Purnendu, Ramakrishna, Saravana, Siddharth, Sovan, Tanmay, and Vivek have joined our research group. A warm welcome to all of them!

• Radha S. graduated with a PhD thesis Design of Power Efficient Continuous-Time ΔΣ Modulators for Wireless Communication Receivers. Congratulations!

• Rakshitdatta K. S. graduated with an MS thesis Design and Simulation Techniques for Low Distortion Drivers for Analog-to-Digital Converters. Congratulations!

• The paper A 2-Channel 1MHz BW, 80.5dB DR ADC Using ΔΣ Modulator and Zero-ISI Filter by Debasish Behera and Nagendra Krishnapura will be presented at the 2014 European Solid State Circuits Conference to be held in Venice, Italy in September 2014.

• Gaurav Agrawal has been awarded the IEEE MTT-S Undergraduate/Pre-graduate Scholarship for Fall 2014! The award includes a scholarship, a certificate that will be presented at IMS 2015, financial support towards attending IMS 2015 and 1-year IEEE and MTT-S membership. Congratulations Gaurav!

• The paper Directional Coupler with High Isolation Bandwidth using Electrical Balance by Abhishek Kumar, S. Aniruddhan and Radha Krishna Ganti will be presented at the 2014 IEEE International Microwave Symposium to be held in Tampa Bay, Florida, USA in June 2014.

• The paper Replica Bias Scheme for Efficient Power Utilization in High-Frequency CMOS Digital Circuits by Saravanan K. and S. Aniruddhan will be presented at the 2014 International Symposium on Circuits and Systems to be held in Melbourne, Australia in June 2014.

• The paper Ground-Bounce Reduction in Narrow-Band RF Front-Ends by Abhishek Kumar and S. Aniruddhan will be presented at the 2014 International Symposium on Circuits and Systems to be held in Melbourne, Australia in June 2014.

• The paper Multi-Band RF Time Delay Element Based on Frequency Translation by Gaurav Agrawal, S. Aniruddhan and Radha Krishna Ganti will be presented at the 2014 International Symposium on Circuits and Systems to be held in Melbourne, Australia in June 2014.

• The paper Efficient Estimation of Noise and Signal Transfer Functions of a Continuous-Time Delta Sigma Modulator by Shanthi Pavan will be presented at the 2014 International Symposium on Circuits and Systems to be held in Melbourne, Australia in June 2014.

• The paper A 5mW CT ΔΣ ADC with Embedded 2nd-Order Active Filter and VGA Achieving 82dB DR in 2MHz BW by Radha Rajan and Shanthi Pavan will be presented at the 2014 International Solid-State Conference to be held in San Francisco in Feb. 2014

• Nagendra Krishnapura is nominated to be an Associate Editor of the journal IEEE Transactions on Circuits and Systems-I: Regular Papers for the years 2014-15.

• Shanthi Pavan is nominated to be Editor-in-Chief of the journal IEEE Transactions on Circuits and Systems-I: Regular Papers for the years 2014-15.

2013

• The paper A 280 μW Audio Continuous-Time Modulator with 103 dB DR and 102 dB A-Weighted SNR by Amrith Sukumaran and Shanthi Pavan was presented at the Asian Solid-State Circuits Conference held in Singapore in November 2013. This work was also selected for the student demo at the conference.

• The paper A 1.2 V 285 μA Analog Front End Chip for a Digital Hearing Aid in 0.13 μm CMOS by Amrith Sukumaran, Kunal Karanjkar, Sandeep Jhanwar, Nagendra Krishnapura, and Shanthi Pavan was presented at the Asian Solid-State Circuits Conference held in Singapore in November 2013.

• Abhishek B, Ananya Senapati, Ashwin Kumar, Binoy Jose, Chithra, Lakshman Kumar, Pradeep Kumar Chandrasekar, Prakash Kumar Lenka, Shraranaprasad Melkundi, and Sujith Kumar have joined our research group. A warm welcome to all of them!

• The paper A Model-Agnostic Technique for Simulating Per-Element Distortion Contributions by Nagendra Krishnapura and Rakshitdatta KS will be presented at the 2013 Custom Integrated Circuits conference to be held in San Jose in September 2013.

• The paper A Lumped Component Programmable Delay Element for Ultra-Wideband Beamforming by Naga Rajesh and Shanthi Pavan will be presented at the 2013 Custom Integrated Circuits conference to be held in San Jose in September 2013.

• The paper Improved characterization of high speed continuous time delta sigma modulators using a duobinary test interface by Ankesh Jain and Shanthi Pavan received the Best Student Paper award at the 2013 International Symposium on Circuits and Systems held in Beijing, China in May 2013. Congratulations Ankesh !

2012

• Shanthi Pavan received the 2012 Shanti Swarup Bhatnagar Prize in the Engineering Sciences category. The prize is named after the founder-Director General of CSIR. It is given annually to young scientists below the age of 45 who have made outstanding contributions in various fields of science and technology and is India's premier award in these areas. Congratulations, Shanthi!

• The paper A Continuous-time Delta Sigma Modulator with 87dB Dynamic Range in a 2MHz Signal Bandwidth Using a Switched-Capacitor Return-to-Zero DAC by Timir Nandi, Karthikeya Boominathan, and Shanthi Pavan will be presented at the 2012 Custom Integrated Circuits Conference to be held in San Jose, USA in Sep. 2012.

• Abhishek Kumar, Anandha Ruban T T, Anoop N Bhat, Gaurav Agrawal, Peeyoosh Mirajkar, Praveen M V, Sreenivasa Mallia S, and Vipul Bajaj have joined the research program in VLSI this year. A warm welcome to all of them!

• The paper A 16MHz BW 75dB DR CT Delta Sigma ADC compensated for more than one cycle excess loop delay by Vikas Singh and others is published in the August 2012 issue of the IEEE Journal of Solid State Circuits.

• The paper Analysis and Design of a High Speed Continuous-time ΔΣ Modulator Using the Assisted Opamp Technique by Ankesh Jain and others is published in the July 2012 issue of the IEEE Journal of Solid State Circuits.

• The paper Quadrature Generation Techniques in CMOS Relaxation Oscillators by Aniruddhan S. will be presented at the 2012 International Symposium on Circuits and Systems to be held in Seoul in May 2012.

• The papers Introducing Negative Feedback with an Integrator as the Central Element and Synthesis Based Introduction to Opamps and Phase Locked Loops by Nagendra Krishnapura will be presented at the 2012 International Symposium on Circuits and Systems to be held in Seoul in May 2012.

• The paper Device Noise in Continuous-Time Delta Sigma Modulators with Switched-Capacitor Feedback DACs by Radha S. and Shanthi Pavan will be presented at the 2012 International Symposium on Circuits and Systems to be held in Seoul in May 2012.

• The paper A 15mW 3.6GS/s CT-ΔΣ ADC with 36MHz Bandwidth and 83dB DR in 90nm CMOS by Pradeep Shettigar and Shanthi Pavan will be presented at the International Solid State Circuits Conference(ISSCC) held in San Francisco in February 2012. This is the first paper from Indian academia at ISSCC, which is the premier venue for papers on integrated circuits.This paper is also the winner of the ISSCC 2012 Silkroad Award.

• Dr. Eric Klumperink of the University of Twente, the Netherlands will deliver a series of lectures at IIT Madras on low noise RF circuits and circuit design challenges for cognitive radios. The topics covered can be seen at this link. All are welcome. Interested participants can register at this link. The lecture series will be held on 11th and 12th January 2012(starting at 9am) and is sponsored by the Special Manpower Development Project for VLSI(SMDP) under the Department of Information Technology.

2011

• IIT Madras will host the IEEE Solid-State Circuits Society Distinguished Lecture Series on Analog/Mixed Signal Design and Industry Challenges on 9th December. Prof. Bernhard Boser (UC Berkeley), Prof. Boris Murmann (Stanford), Prof. Shanthi Pavan (IIT Madras) and Dr. Rakesh Kumar (TCX Technology Connexions) will deliver the lectures. See this flyer for details. The lectures will be held at the Central Lecture Theatre in the Humanities and Sciences Block.

• Vikas Singh received the Innovative Student Projects Award from the Indian National Academy of Engineering(INAE) for 2011. Congratulations, Vikas!

• Shanthi Pavan was elected a fellow of the Indian National Academy of Engineering(INAE). Congratulations, Shanthi!

• The paper titled A 16MHz BW 75dB DR CT ΔΣ ADC compensated for more than one cycle excess loop delay by Vikas Singh and others will be presented at the 2011 Custom Integrated Circuits Conference to be held in San Jose, USA in September 2011.

• The paper titled A 4mW 1GS/S Continuous-Time DeltaSigma Modulator with 15.6MHz Bandwidth and 67dB Dynamic Range by Ankesh Jain and others will be presented at the 2011 European Solid State Circuits Conference to be held in Helsinki, Finland in September 2011.

• The paper titled Active Filters using the Gm-Assisted OTA-RC Technique by Siva Thygarajan, Shanthi Pavan and Prabu Sankar will appear in the July 2011 issue of the IEEE Journal of Solid State Circuits.

• The paper titled On Pulse Position Modulation and its Application to PLLs for Spur Reduction by Chembiyan Thambidurai and Nagendra Krishnapura will appear in the July 2011 issue of the IEEE Transactions on Circuits and Systems I: Regular Papers.

• The paper titled On Continuous-time Delta Sigma Modulators with Return to Open DACs by Shanthi Pavan will appear in the May 2011 issue of the IEEE Transactions on Circuits and Systems II: Express Briefs

• IIT Madras students Satish Kannan, Enbasekar D., and Ananda Narayanan B. were the winners in the TI Analog Design Contest 2010 with their entry Life Saving Low Cost Integrated Wireless Health Monitoring System with Emergency Response.

• Aniruddhan Sankaran joined the our group. He was formerly at Qualcomm, San Diego and has extensive experience with RF circuits. Welcome, Dr. Aniruddhan!

• The paper titled Electronic Time Stretching for Fast Digitization by Nagendra Krishnapura will be presented at the 2011 International Symposium on Circuits and Systems to be held in Rio de Janeiro, Brazil in May 2011.

• The paper titled The Inconvenient Truth About Alias Rejection in Continuous Time Delta Sigma Converters by Shanthi Pavan will be presented at the 2011 International Symposium on Circuits and Systems to be held in Rio de Janeiro, Brazil in May 2011.

• The paper titled A High IIP3 Third Order Elliptic Filter with Current Efficient Feedforward Compensated Opamps by Nagendra Krishnapura, Abhishek Agrawal, and Sameer Singh will be published in the April 2011 issue of the IEEE Transactions on Circuits and Systems II: Express Briefs

• The paper titled Alias Rejection of Continuous-time Delta Sigma Modulators with Switched Capacitor DACs by Shanthi Pavan is published in the Feb. 2011 issue of the IEEE Transactions on Circuits and Systems I: Regular Papers

• Vikas Singh won the ISA Technovation award 2011 sponsored by the India Semiconductor Association in the student category for his work on high speed ΔΣ modulator design.

• Sandeep S. K. won the second prize at Nebula-Analog Design Contest from Cosmic Circuits.

2010

• The 24th International Conference on VLSI Design will be held at IIT Madras from 2nd to 7th January 2011. Details can be found at http://www.vlsiconference.com/.

• The paper titled Power Reduction in Continuous-Time Δ∑ Modulators using the Assisted Opamp Technique by Shanthi Pavan and Prabu Sankar is the most read paper from the IEEE Journal of Solid State Circuits in July 2010, and the 11th most downloaded paper from all of IEEEXplore in July 2010. link

• The paper titled Compensating for Quantizer Delay in Excess of One Clock Cycle in Continuous-Time Δ∑ Modulators by Vikas Singh, Nagendra Krishnapura, and Shanthi Pavan is published in the Sep. 2010 issue of the IEEE Transactions on Circuits and Systems II: Express Briefs.

• Shanthi Pavan will be presenting a tutorial titled Design Techniques for High Performance Continuous-Time Delta-Sigma ADCs at the Custom Integrated Circuits Conference to be held in San Jose, USA from 19 to 22 Sep. 2010.

• The paper titled Low Distortion Active Filters Using the Gm-Assisted OTA-RC Technique by Siva Thyagarajan, Shanthi Pavan, and Prabu Sankar will be presented t the European Solid State Circuits Conference to be held in Seville, Spain from 13 to 17 Sep. 2010.

• The paper titled Efficient Simulation of Weak Loop Filter Nonlinearities in Continuous-time Oversampling Converters by Shanthi Pavan is published in the Aug. 2010 issue of the IEEE Transactions on Circuits and Systems I: Regular Papers

• The paper titled “Efficient Determination of Feedback DAC Errors for Digital Correction in Delta-Sigma A/D Converters” by Nagendra Krishnapura will be presented at the 2010 International Symposium on Circuits and Systems to be held in Paris, France from May 31 to June 2, 2010.

• The paper titled “A 100 μW Decimator for a 16 Bit 24 kHz Bandwidth Audio Delta Sigma Modulator” by Shankar Parameswaran and Nagendra Krishnapura will be presented at the 2010 International Symposium on Circuits and Systems to be held in Paris, France from May 31 to June 2, 2010.

• The paper titled “Spur Reduction in Wideband PLLs by Random Positioning of Charge Pump Current Pulses” by Chembian Thambidurai and Nagendra Krishnapura will be presented at the 2010 International Symposium on Circuits and Systems to be held in Paris, France from May 31 to June 2, 2010.

• The paper titled “Understanding Weak Loop Filter Nonlinearities in Continuous Time Delta-Sigma Converters” by Shanthi Pavan will be presented at the 2010 International Symposium on Circuits and Systems to be held in Paris, France from May 31 to June 2, 2010.

• IIT Madras students Anoosh G., Raghunandan S., Sundar Aditya S. were the first runner up in the TI Analog Design Contest 2009 with their entry Obstacle detector for use in flooded roads.

2009

• The paper “A 110μW single bit audio continuous-time oversampled converter with 92.5dB dynamic range” by Shanthi Pavan and Prabu Sankar will be presented at the 2009 European Solid State Circuits Conference to be held in Athens, Greece from 15th to 17th September 2009.

• Shanthi Pavan won the 2009 Darlington Award from the IEEE Circuits and Systems Society for his paper “Power and Area Efficient Adaptive Equalization at Microwave Frequencies” published in the IEEE Transactions on Circuits and Systems I : Regular Papers in the July 2008 issue. The award recognizes the best paper bridging the gap between theory and practice published in IEEE Transactions on Circuits and Systems over the last two years(2007-2008). This is the first time that work done in India has received this award.

• The paper titled “Compact Lowpass Ladder Filters Using Tapped Coils” authored by Nagendra Krishnapura, Varun Gupta, and Neetin Agrawal will be presented at the 2009 International Symposium on Circuits and Systems to be held in Taipei, Taiwan, from May 24-27 2009.

• The paper titled “Automatic Tuning of Time Constants in Single Bit Continuous-Time Delta-Sigma Modulators” authored by Saurabh Saxena, Prabu Sankar, and Shanthi Pavan will be presented at the 2009 International Symposium on Circuits and Systems to be held in Taipei, Taiwan, from May 24-27 2009.

• Eeshan Miglani and Muthusubramanian NV won the first and third prizes at Nebula-Analog Design Contest from Cosmic Circuits. Prabu Sankar, Shankar P, and Uttam Patro were among the finalists.

• Nagendra Krishnapura and Shanthi Pavan will be presenting a tutorial entitled Negative feedback system and circuit design at the 22nd International Conference on VLSI Design to be held in Delhi, India from Jan. 5-9 2009.

• The paper titled “A Comparison of Approaches to Carrier Generation for Zigbee Transceivers” authored by Leburu Manojkumar, Arun Mohan, and Nagendra Krishnapura will be presented at the 22nd International Conference on VLSI Design to be held in Delhi, India from Jan. 5-9 2009.

2008

• A paper titled “Excess Loop Delay Compensation in Continuous-time Sigma Delta Modulators” authored by Shanthi Pavan appeared in the November issue of the IEEE Transactions on Circuits and Systems : Express Briefs.

• A paper titled “Readout Electronics for an EISCAP Biosensor” authored by Hareesh Vemulachedu, Shanthi Pavan and Enakshi Bhattacharya was presented at the IEEE Biomedical Circuits and Systems Symposium held in Baltimore from Nov.19-21, 2008.

• A paper titled “A 20.7mW Continuous-time Delta Sigma Modulator with 15MHz Bandwidth and 70dB Dynamic Range” authored by Karthikeyan Reddy and Shanthi Pavan was presented at the European Solid State Circuits Conference, held in Edinburgh from Sept.19-23rd, 2008.

• Nagendra Krishnapura has received the 2008 Young Faculty Recognition Award from IIT Madras.

• A paper titled Power and Area Efficient Adaptive Equalization at Microwave Frequencies authored by Shanthi Pavan appeared in the July issue of the IEEE Transactions on Circuits and Systems : Regular Papers.

• Hari Prasath V won the Achim Bopp prize for the best hardware project in Electrical Engineering for his project entitled “16 bit audio band digital to analog converter”. The award was conferred at the 45th Convocation on 25th July 2008.

• Laxminidhi T received his PhD degree and Reddy Karthikeyan, I Rajesh, Murali SS and Kannan G received their MS degrees at the 45th Convocation on 25th July 2008.

• VLSI and Microelectronics groups of EE and CS departments of IIT Madras have jointly won the 2008 TechnoShield award from India Semiconductor Association(ISA). TechnoShield is a rolling shield for the best research entity such as laboratory or a department in India for its remarkable work in semiconductor space.

• Prof. K Radhakrishna Rao Foundation is sponsoring a two week workshop on Analog VLSI for junior faculty from engineering colleges in India in order to provide in depth knowledge of analog design and help them teach courses in their colleges. The workshop will be held at BVB College, Hubli from June 16-27, 2008. Nagendra Krishnapura will be teaching a part of the workshop.

• The paper “A Power Optimized Continuous-time Delta-Sigma Modulator for Audio Applications” by Shanthi Pavan, Nagendra Krishnapura, Ramalingam Pandarinathan, and Prabu Sankar was published in the February issue of the IEEE Journal of Solid State Circuits.

• Shanthi Pavan and Nagendra Krishnapura presented a tutorial on Oversampled analog to digital converters at the 21st International Conference on VLSI Design held in Hyderabad, India from Jan. 4-8 2008.

• Shanthi Pavan has been nominated as an Associate Editor of IEEE Transactions on Circuits and Systems (Part I) - Regular Papers.

• Nagendra Krishnapura has been nominated as an Associate Editor of IEEE Transactions on Circuits and Systems-(Part II) - Express Briefs.

2007

• Prof. K Radhakrishna Rao Foundation is sponsoring a two week workshop on Analog VLSI for junior faculty from engineering colleges in India in order to provide in depth knowledge of analog design and help them teach courses in their colleges. The workshop will be held at BVB College, Hubli from December 17-28, 2007. Our analog faculty will be teaching a part of the workshop. This is a follow up to the one held at Thiagarajar College of Engineering, Madurai from June 4-15, 2007.

• The paper “Analysis of Integrator Nonlinearity in a Class of Continuous-Time Delta-Sigma Modulators” by P. Sankar and S. Pavan was published in the December issue of the IEEE Transactions on Circuits and Systems: Express Briefs.

• The paper “Fundamental Limitations of Continuous-Time Delta-Sigma Modulators due to Clock Jitter” by K. Reddy and S. Pavan was published in the October issue of the IEEE Transactions on Circuits and Systems: Regular Papers.

• Lectures by faculty in the VLSI group are now online. Follow this link to access them. You'll need to register with a valid e-mail address to receive the password.

• The paper “A Distortion Compensating Flash Analog-to-Digital Conversion Technique” by Srinivas VV et al., was one of the most read recent(2006) articles in the IEEE Journal of Solid State Circuits.

• The paper “A Low Power 44-300 MHz Programmable Active-RC Filter in 0.18µm CMOS” by T. Laxminidhi, V. Prasadu and Shanthi Pavan will be presented at the Custom Integrated Circuits Conference, to be held in San Jose September 16-19, 2007.

• The paper “A 90 microwatt 15-bit Delta Sigma ADC for Digital Audio” by Shanthi Pavan, Nagendra Krishnapura, Ramalingam Pandarinathan, and Prabu Sankar will be presented at the 33rd European Solid-State Circuits Conference, to be held in Munich, Germany from September 11-13, 2007.

• Prof. K Radhakrishna Rao Foundation is sponsoring a two week workshop on Analog VLSI for junior faculty from engineering colleges in India in order to provide in depth knowledge of analog design and help them teach courses in their colleges. This will be held in Thiagarajar College of Engineering, Madurai from June 4-15, 2007. Our analog faculty will be teaching a part of the workshop. Details of the program and the application form are available here. Details about the foundation and some notes from the workshop can be found here and here.

• The paper “Automatic Tuning of Time Constants in Continuous-Time Delta–Sigma Modulators” by Shanthi Pavan and Nagendra Krishnapura was published in the April 2007 issue of the IEEE Transactions on Circuits and Systems Part II: Express Briefs.

• The paper “Singly Terminated & Bi-Transversal Transmission Line Filters for High Speed Adaptive Equalization” by Shanthi Pavan was presented at the International Symposium on Circuits and Systems in New Orleans in May 2007.

• The paper “Design Centering High Frequency Integrated Continuous-Time Filters” by Tonse Laxminidhi and Shanthi Pavan was presented at the International Symposium on Circuits and Systems in New Orleans in May 2007.

2006

• Shanthi Pavan has received the Young Engineer Award for 2006 from the Indian National Academy of Engineering.

• Shanthi Pavan has been nominated as an Associate Editor of IEEE Transactions on Circuits and Systems-Part II.

• The paper “A Distortion Compensating Flash Analog-to-Digital Conversion Technique” by Srinivas VV et al. was published in the September 2006 issue of the IEEE Journal of Solid State Circuits.

• The paper “A 70-500 MHz Programmable CMOS Filter Compensated for MOS Nonquasistatic Effects” by Laxminidhi T. and Shanthi Pavan was presented at the European Solid State Circuits Conference on 20th September 2006.

• The paper “Rapid Simulation of Current Steering Digital-to-Analog Converters using Verilog-A” by Murali SS and Shanthi Pavan was presented at the Custom Integrated Circuits Conference on 11th September 2006.

• The paper “A Technique for Accurate Frequency Response Measurement of Integrated Continuous-Time Filters” by Laxminidhi T and Shanthi Pavan was presented at the Custom Integrated Circuits Conference on 11th September 2006.